Works (5)

Updated: April 11th, 2023 10:13

2021 journal article

A Scalable Cluster-based Hierarchical Hardware Accelerator for a Cortically Inspired Algorithm

ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 17(4).

By: S. Dey n, L. Baker n, J. Schabel n, W. Li n & P. Franzon n

author keywords: Neuromorphic computing; accelerator; cortical processor; hierarchical temporal memory; sparse distributed memory
TL;DR: A scalable, configurable and cluster-based hierarchical hardware accelerator through custom hardware architecture for Sparsey, a cortical learning algorithm inspired by the operation of the human cortex that uses a Sparse Distributed Representation to enable unsupervised learning and inference in the same algorithm. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Sources: Web Of Science, NC State University Libraries
Added: February 28, 2022

2021 journal article

Hardware Implementation of Hierarchical Temporal Memory Algorithm

ACM JOURNAL ON EMERGING TECHNOLOGIES IN COMPUTING SYSTEMS, 18(1).

By: W. Li n, P. Franzon n, S. Dey n & J. Schabel n

author keywords: Hierarchical temporal memory (HTM); ASIC design; distributed memory; KTH benchmark
TL;DR: Hierarchical temporal memory is an un-supervised machine learning algorithm that can learn both spatial and temporal information of input that has been successfully applied to multiple areas. (via Semantic Scholar)
Source: Web Of Science
Added: January 23, 2023

conference paper

Hardware implementation of hierarchical temporal memory algorithm

Li, W. F., & Franzon, P. 2016 29th IEEE International System-on-Chip Conference (SOCC), 133–138.

By: W. Li & P. Franzon

Source: NC State University Libraries
Added: August 6, 2018

conference paper

Hardware implementation of hierarchical temporal memory algorithm

Li, W. F., & Franzon, P. 2016 29th IEEE International System-on-Chip Conference (SOCC), 133–138.

By: W. Li & P. Franzon

Source: NC State University Libraries
Added: August 6, 2018

conference paper

Processor-in-memory support for artificial neural networks

Schabel, J., Baker, L., Dey, S., Li, W. F., & Franzon, P. D. 2016 IEEE International Conference on Rebooting Computing (icrc).

By: J. Schabel, L. Baker, S. Dey, W. Li & P. Franzon

Source: NC State University Libraries
Added: August 6, 2018

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