@article{francisco_davis_franzon_2023, title={A Deep Transfer Learning Design Rule Checker With Synthetic Training}, volume={40}, ISSN={["2168-2364"]}, url={https://doi.org/10.1109/MDAT.2022.3162786}, DOI={10.1109/MDAT.2022.3162786}, abstractNote={Deep transfer learning is applied to the task of design rule checking (DRC). A parameterized synthetic data set generator is used to train the model. —Ulf Schlichtmann, Technical University of Munich}, number={1}, journal={IEEE DESIGN & TEST}, author={Francisco, Luis and Davis, W. Rhett and Franzon, Paul}, year={2023}, month={Feb}, pages={77–84} }
 @article{franzon_davis_rotenberg_stevens_lipa_nigussie_pan_baker_schabel_dey_et al._2021, title={Design for 3D Stacked Circuits}, ISSN={["2380-9248"]}, DOI={10.1109/IEDM19574.2021.9720553}, abstractNote={2.5D and 3D technologies can give rise to a node equivalent of scaling due to improved connectivity. Aggressive exploitation scenarios include functional partitioning, circuit partitioning, logic on DRAM, design obfuscation and modular chiplets. Design issues that need to be addressed in pursuing such exploitations include thermal management, design for test and computer aided design.}, journal={2021 IEEE INTERNATIONAL ELECTRON DEVICES MEETING (IEDM)}, author={Franzon, P. and Davis, W. and Rotenberg, E. and Stevens, J. and Lipa, S. and Nigussie, T. and Pan, H. and Baker, L. and Schabel, J. and Dey, S. and et al.}, year={2021} }
 @inproceedings{davis_franzon_francisco_huggins_jain_2021, title={Fast and Accurate PPA Modeling with Transfer Learning}, ISSN={["1933-7760"]}, DOI={10.1109/ICCAD51958.2021.9643533}, abstractNote={The power, performance and area (PPA) of digital blocks can vary 10:1 based on their synthesis, place, and route tool recipes. With rapid increase in number of PVT corners and complexity of logic functions approaching 10M gates, industry has an acute need to minimize the human resources, compute servers, and EDA licenses needed to achieve a Pareto optimal recipe. We first present models for fast accurate PPA prediction that can reduce the manual optimization iterations with EDA tools. Secondly we investigate techniques to automate the PPA optimization using evolutionary algorithms. For PPA prediction, a baseline model is trained on a known design using Latin hypercube sample runs of the EDA tool, and transfer learning is then used to train the model for an unseen design. For a known design the baseline needed 150 training runs to achieve a 95% accuracy. With transfer learning the same accuracy was achieved on a different (unseen) design in only 15 runs indicating the viability of transfer learning to generalize PPA models. The PPA optimization technique, based on evolutionary algorithms, effectively combines the PPA modeling and optimization. Our approach reached the same PPA solution as human designers in the same or fewer runs for a CORTEX-M0 system design. This shows potential for automating the recipe optimization without needing more runs than a human designer would need.}, booktitle={2021 IEEE/ACM International Conference On Computer Aided Design (ICCAD)}, author={Davis, W.R. and Franzon, P. and Francisco, L. and Huggins, B. and Jain, R.}, year={2021} }
 @book{davis_chu_mcconnell_dolan_norris_ortiz_plemmon_ridgeway_scaife_stewart_et al._1998, title={Cornelius Lanczos: Collected published papers with commentaries}, ISBN={0929493003}, publisher={Raleigh, NC: College of Physical and Mathematical Sciences, North Carolina State University}, author={Davis, W. R. and Chu, M. T. and McConnell, J. R. and Dolan, P. and Norris, L. K. and Ortiz, E. and Plemmon, R. J. and Ridgeway, D. and Scaife, B.K.P. and Stewart, W. J. and et al.}, year={1998} }