@article{yeh_wang_floyd_2021, title={75-86-GHz Signal Generation Using a Phase-Controlled Quadrature-Push Quadrupler Driven by a QVCO or a Tunable Polyphase Filter}, volume={69}, ISSN={["1557-9670"]}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85112660002&partnerID=MN8TOARS}, DOI={10.1109/TMTT.2021.3097711}, abstractNote={This article demonstrates a $W$ -band local-oscillator generation technique in 120-nm SiGe BiCMOS technology with high output power and high efficiency. The circuit employs a frequency quadrupler that is driven with differential quadrature inputs that are provided by either a quadrature voltage-controlled oscillator (QVCO) or a tunable active polyphase filter (PPF) circuit. The quadrupler employs a phase-controlled quadrature-push (PCQP) topology using stacked devices with a lower class-C common-emitter (CE) amplifier generating a current that is then modulated by an upper common-base (CB) amplifier driven out-of-phase with the lower devices. Such a structure generates a strong fourth-order harmonic. Four such stacks driven at their input using accurate differential quadrature signals increase the fourth-harmonic output power while suppressing other harmonics. The differential quadrature signals for the quadrupler are provided using either a PPF circuit or a capacitive injection-locking QVCO, which achieves wide tuning range and low phase noise. Both approaches are evaluated through the measurement of separate test circuits. The LO circuit using the QVCO provides 8–11.5-dBm output power over 75.2–83 GHz, power efficiency of 2.2–4.1%, including QVCO and buffer power, >20-dB harmonic rejection in the lower frequency range, and >14.4-dB harmonic rejection in the upper frequency range. The LO circuit using the active PPF provides 8.4–11.2-dBm output power over 75.6–82.8 GHz, power efficiency of 2.4–4.8%, including PPF and buffer power, and >23-dB harmonic rejection.}, number={10}, journal={IEEE TRANSACTIONS ON MICROWAVE THEORY AND TECHNIQUES}, author={Yeh, Yi-Shin and Wang, Weihu and Floyd, Brian A.}, year={2021}, month={Oct}, pages={4521–4532} }
 @article{fujibayashi_takeda_wang_yeh_stapelbroek_takeuchi_floyd_2017, title={A 76- to 81-GHz Multi-Channel Radar Transceiver}, volume={52}, ISSN={0018-9200 1558-173X}, url={http://dx.doi.org/10.1109/jssc.2017.2700359}, DOI={10.1109/jssc.2017.2700359}, abstractNote={This paper presents a packaged 76- to 81-GHz transceiver chip implemented in SiGe BiCMOS for both long-range and short-range automotive radars. The chip contains a two-channel transmitter (TX), a six-channel receiver (RX), a local-oscillator (LO) chain, and built-in self-test (BIST) circuitry. Each transmit channel includes multiple variable-gain amplifiers and a two-stage power amplifier. Measured on-die output power per channel is +18 dBm at 25 °C, decreasing to +16 dBm at 125 °C. Each receive channel includes a current-mode mixer, followed by intermediate-frequency buffers. At 25 °C, measured on-die noise figure is 10–11 dB, conversion gain is 14–15 dB, and input 1-dB compression point exceeds +1 dBm. An integrated LO chain drives the transmit and receive chains and includes an 18.5- to 20.6-GHz voltage-controlled oscillator connected to cascaded frequency doublers and a divide-by-four prescaler. At 25 °C, measured phase noise is −100 dBc/Hz at 1-MHz offset from a 77-GHz carrier. Integrated BIST circuits enable the measurement of signal power, RX gain, channel-to-channel phase, and internal temperature. The chip is flip-chip packaged into a ball-grid array and extracted interconnect loss for the package is 1.5 to 2 dB. Total power consumption for the chip is 1.8 W from 3.3 V for a single-TX, six-RX mode.}, number={9}, journal={IEEE Journal of Solid-State Circuits}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Fujibayashi, Takeji and Takeda, Yohsuke and Wang, Weihu and Yeh, Yi-Shin and Stapelbroek, Willem and Takeuchi, Seiji and Floyd, Brian}, year={2017}, month={Sep}, pages={2226–2241} }
 @inproceedings{fujibayashi_takeda_wang_yeh_stapelbroek_takeuchi_floyd_2016, title={A 76-to 81-GHz packaged single-chip transceiver for automotive radar}, volume={2016-November}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-85002194596&partnerID=MN8TOARS}, DOI={10.1109/bctm.2016.7738943}, abstractNote={This paper presents a flip-chip packaged 76- to 81-GHz transceiver chip implemented in SiGe BiCMOS technology for both long-range and short-range automotive radar applications. The single chip contains a two-channel transmitter with +18-dBm saturated output power per channel; an LO chain with ×4 multiplier, wide-band 20-GHz VCO with -100-dBc/Hz phase noise at 1-MHz offset referenced to a 77-GHz carrier, and divide-by-four prescaler; and a six-channel receiver with 10- to 11-dB noise figure, 14- to 15-dB conversion gain and +1-dBm input P1dB in unpackaged condition. The interconnect loss through the BGA package at 80 GHz is 1.5 to 2 dB. Built-in self-test (BIST) circuits are integrated to enable RF output power, receiver gain, relative channel-to-channel phase and internal temperature measurement.}, booktitle={2016 ieee bipolar/bicmos circuits and technology meeting (bctm)}, author={Fujibayashi, T. and Takeda, Y. and Wang, W. H. and Yeh, Y. S. and Stapelbroek, W. and Takeuchi, S. and Floyd, Brian}, year={2016}, pages={166–169} }
 @inproceedings{wang_takeda_yeh_floyd_2014, title={A 20GHz VCO and frequency doubler for W-band FMCW radar applications}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-84903826560&partnerID=MN8TOARS}, DOI={10.1109/sirf.2014.6828522}, abstractNote={This paper presents a low-noise Colpitts VCO with transformer-based resonator and a 20-to-40GHz frequency doubler for use in 76~77GHz long-range radar and 77~81GHz short-range radar transceivers. To reduce supply pushing and AM-to-PM noise conversion in the high-gain VCO, a differentially tuned, transformer-coupled varactor is used. Implemented in 0.12-μm SiGe BiCMOS technology, the VCO and doubler achieve an 11% continuous tuning range from 37.5-42GHz, and a phase noise between -103 and -106dBc/Hz at 1MHz offset from the 40GHz carrier.}, booktitle={2014 IEEE 14th Topical Meeting on Silicon Monolithic Integrated Circuits in RF Systems (SIRF)}, author={Wang, W. H. and Takeda, Y. and Yeh, Y. S. and Floyd, Brian}, year={2014}, pages={104–106} }
 @inproceedings{takeda_fujibayashi_yeh_wang_floyd_2014, title={A 76-to 81-GHz transceiver chipset for long-range and short-range automotive radar}, url={http://www.scopus.com/inward/record.url?eid=2-s2.0-84905054469&partnerID=MN8TOARS}, DOI={10.1109/mwsym.2014.6848490}, abstractNote={This paper presents a 76- to 81-GHz transceiver chipset implemented in SiGe BiCMOS technology for both long-range and short-range radar applications. A four-channel receiver achieves 11-12 dB noise figure, 16-dB conversion gain, and -2 dBm input compression point. A single-channel transmitter with integrated subharmonic VCO achieves +17 dBm output power and -97 dBc/Hz phase noise at 1-MHz offset referenced to the 77-GHz carrier. The chipset includes built-in-self-test features allowing measurement of RF power, gain, and phase. Total power consumption is 0.79 W for the four-channel receiver and 1.16 W for the transmitter.}, booktitle={2014 ieee mtt-s international microwave symposium (ims)}, author={Takeda, Y. and Fujibayashi, T. and Yeh, Y. S. and Wang, W. H. and Floyd, Brian}, year={2014} }