@inproceedings{huang_lee_bondarenko_baker_sheridan_huang_baliga_2014, title={Experimental study of 650V AlGaN/GaN HEMT short-circuit safe operating area (SCSOA)}, booktitle={Proceedings of the international symposium on power semiconductor}, author={Huang, X. and Lee, D. Y. and Bondarenko, V. and Baker, A. and Sheridan, D. C. and Huang, A. Q. and Baliga, B. J.}, year={2014}, pages={273–276} }
 @inproceedings{lee_huang_huang_brunt_2013, title={An analytical investigation of the effect of varied buffer layer designs on the turn-off speed for 4H-SiC IGBTs}, DOI={10.1109/wipda.2013.6695559}, abstractNote={We propose a criterion to quantify the relationship between buffer layer parameters at a given total charge and turn-off speed for 4H-SiC IGBTs. Three phases of voltage ramp are analytically discussed during the inductive load turn-off by solving each corresponding continuity equation. Extra emphasis will be placed on Phase II - a transition phase in between the initial voltage ramp and punch-through.}, booktitle={2013 1st IEEE Workshop on Wide Bandgap Power Devices and Applications (WiPDA)}, author={Lee, M. C. and Huang, X. and Huang, A. and Brunt, E.}, year={2013}, pages={44–47} }
 @inproceedings{huang_wang_li_huang_baliga_2013, title={Short-circuit capability of 1200V SiC MOSFET and JFET for fault protection}, DOI={10.1109/apec.2013.6520207}, abstractNote={The short-circuit capability of power switches is crucial for the fault protection. In this paper, 1200V SiC MOSFET and normally-off SiC JFET have been characterized and their short-circuit capabilities have been studied and analyzed at 400V DC bus voltage. Due to different physics in the channels, SiC MOSFET and SiC JFET show different types of temperature coefficient. During the short-circuit operation, the saturation current, Isat, of SiC MOSFET increases for several microseconds before the gentle decreasing while that of SiC JFET decreases drastically from the very beginning. The SiC MOSFETs failed after short-circuit operations of 80μs and 50μs at 10V and 15V gate bias respectively while the SiC JFET could survive a short-circuit time more than 1.4msec.}, booktitle={2013 twenty-eighth annual ieee applied power electronics conference and exposition (apec 2013)}, author={Huang, X. and Wang, G. Y. and Li, Y. S. and Huang, A. Q. and Baliga, B. J.}, year={2013}, pages={197–200} }
 @inproceedings{huang_baliga_huang_suvorov_capell_cheng_agarwal_2013, title={SiC Symmetric Blocking Terminations Using Orthogonal Positive Bevel Termination and Junction Termination Extension}, DOI={10.1109/ispsd.2013.6694475}, abstractNote={Symmetric blocking power semiconductor switches require two edge terminations, one for the reverse blocking junction and the other one for the forward blocking junction. In this work, we demonstrated 1100V SiC symmetric blocking edge terminations using orthogonal positive bevel (OPB) termination and a one-zone Junction Termination Extension (JTE). The OPB was formed by orthogonally sawing 45° V-shape trenches into the SiC wafer with a diamond-coated dicing blade. The surface damage was then repaired with dry-etch in SF6/O2 plasma, which reduced the leakage current by around two orders of magnitude. As limited by field reach-through, both the OPB and the JTE terminations show breakdown voltage of 1100V. The P+P-N+ diodes fabricated on the same wafer with the OPB termination showed 1610V avalanche breakdown which was around 83% of ideal value.}, booktitle={Proceedings of the international symposium on power semiconductor}, author={Huang, X. and Baliga, B. J. and Huang, A. Q. and Suvorov, A. and Capell, C. and Cheng, L. and Agarwal, A.}, year={2013}, pages={179–182} }
 @inproceedings{lee_huang_huang_2012, title={An accurate prediction of two-dimensional carrier density profile in IGBT and its significances on steady-state and transient analysis}, DOI={10.1109/ecce.2012.6342637}, abstractNote={This work presents a piecewise two-dimensional steady-state analytical model for insulated gate bipolar transistor (IGBT). The proposed model can accurately describes the dependence of carrier density profile on the ratio of accumulation gate width (Lg) to the half cell width (Lcell) without ignoring the recombination in the drift region. The drift region of IGBT is divided into four regions in this model. By determining the boundary that separates one- and two-dimensional regions, the carrier density profiles in the four regions can be derived with proper boundary conditions. The model is originally developed for, but not limited to, 4H-SiC p-IGBT. The results of proposed model are in good agreement with the simulation results at varied current densities and with different values of Lg/Lcell. The I-V curves in the linear region generated by the proposed model match well with the simulated results. The error of the amount of stored charge generated by one-dimensional model will also be examined.}, booktitle={2012 IEEE Energy Conversion Congress and Exposition (ECCE)}, author={Lee, M. C. and Huang, X. and Huang, A. Q.}, year={2012}, pages={1496–1502} }
 @article{huang_van brunt_baliga_huang_2012, title={Orthogonal Positive-Bevel Termination for Chip-Size SiC Reverse Blocking Devices}, volume={33}, ISSN={["1558-0563"]}, DOI={10.1109/led.2012.2215003}, abstractNote={Symmetric blocking power semiconductor switches require positive-bevel edge terminations for the reverse blocking p-n junction. This technique has been extensively applied to silicon wafer-size devices with high current ratings. In this letter, we propose and experimentally demonstrate, for the first time, that an orthogonal positive-bevel termination can be used for the reverse blocking junction of chip-size SiC devices. The edge termination was formed by sawing the SiC wafer with a V-shaped dicing blade. For proof of concept, our experiment was done on a SiC wafer with a 15.8-μm 6.1 × 1015 cm-3 p-type epitaxial layer grown on an N+ substrate. The positive-bevel termination resulted in a breakdown voltage of over 1000 V as limited by reach-through breakdown even without removal of damage from the sawing. The leakage current was found to be reduced by two orders of magnitude after reactive ion etching of the SiC bevel surface to remove the sawing damage.}, number={11}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Huang, Xing and Van Brunt, Edward and Baliga, B. Jayant and Huang, Alex Q.}, year={2012}, month={Nov}, pages={1592–1594} }
 @inproceedings{huang_wang_lee_huang_2012, title={Reliability of 4H-SiC SBD/JBS diodes under repetitive surge current stress}, DOI={10.1109/ecce.2012.6342436}, abstractNote={The reliability of power diode under surge current stress is crucial to the applications like motor drives. In this paper, the single and repetitive surge reliability of the 4H-SiC Schottky Barrier Diodes (SBDs) and Junction Barrier Schottky (JBS) diodes have been tested and the corresponding failure mechanisms studied. The single surge test results of two SBDs and three JBS didoes suggest a 450W/mm2 constant power line of the safe operation area for single surge current with a half sinusoidal pulse width of 8.3ms. The stress tests show no degradation of SBDs up to 10,000 cycles of surge current below 34.9A/mm2. The JBS diodes show VF degradation after surge stress at different current levels, which might be dependent on the hole injection levels. The aluminum metallization and bipolar degradation are the main limits for the reliability of SiC diodes under surge conditions.}, booktitle={2012 IEEE Energy Conversion Congress and Exposition (ECCE)}, author={Huang, X. and Wang, G. Y. and Lee, M. C. and Huang, A. Q.}, year={2012}, pages={2245–2248} }
 @inproceedings{huang_wang_jiang_huang_2012, title={Ruggedness analysis of 600V 4H-SiC JBS diodes under repetitive avalanche conditions}, DOI={10.1109/apec.2012.6166048}, abstractNote={The repetitive avalanche reliability of power rectifiers is crucial to the safe operation of the hard switching power converters under extreme conditions as well as transient voltage suppression (TVS) applications. In this paper, the ruggedness of two state-of-art 4H-SiC Junction Barrier Schottky (JBS) diodes under repetitive avalanche stresses has been studied. Two different post-stress behaviors have been observed: VF degradation and BV drifting for the two different JBS diodes. The VF degradation could happen to the device that avalanches in the active area. However, for the device that avalanches in the edge termination, the repetitive avalanche stress greatly increases the breakdown voltage for about 100V. These results bring new concerns for SiC devices that are expected to be operated in avalanche conditions.}, booktitle={2012 twenty-seventh annual ieee applied power electronics conference and exposition (apec)}, author={Huang, X. and Wang, G. Y. and Jiang, L. and Huang, A. Q.}, year={2012}, pages={1688–1691} }