Xing Pan

Works (6)

Updated: July 5th, 2023 15:37

2021 journal article

NUMA-aware memory coloring for multicore real-time systems

JOURNAL OF SYSTEMS ARCHITECTURE, 118.

By: X. Pan n & F. Mueller n

author keywords: Memory access; NUMA; Real-time predictability
TL;DR: This work contributes a controller/node-aware memory coloring (CAMC) allocator inside the Linux kernel for the entire address space to reduce access conflicts and latencies by isolating tasks from one another. (via Semantic Scholar)
UN Sustainable Development Goals Color Wheel
UN Sustainable Development Goal Categories
Source: Web Of Science
Added: September 7, 2021

2019 article

The Colored Refresh Server for DRAM

2019 IEEE 22ND INTERNATIONAL SYMPOSIUM ON REAL-TIME DISTRIBUTED COMPUTING (ISORC 2019), pp. 27–34.

By: X. Pan n & F. Mueller n

TL;DR: This work contributes the “Colored Refresh Server” (CRS), a uniprocessor scheduling paradigm that partitions DRAM in two distinctly colored groups such that refreshes of one color occur in parallel to the execution of real-time tasks of the other color. (via Semantic Scholar)
Source: Web Of Science
Added: November 4, 2019

2019 article

The Colored Refresh Server for DRAM

2019 IEEE 40TH REAL-TIME SYSTEMS SYMPOSIUM (RTSS 2019), pp. 146–153.

By: X. Pan n & F. Mueller n

TL;DR: Experimental results confirm that refresh overhead is completely hidden and memory throughput enhanced, and the CRS, a uniprocessor scheduling paradigm that partitions DRAM in two distinctly colored groups such that refreshes of one color occur in parallel to the execution of real-time tasks of the other color, is contributed. (via Semantic Scholar)
Source: Web Of Science
Added: September 28, 2020

2018 article

Controller-Aware Memory Coloring for Multicore Real-Time Systems

33RD ANNUAL ACM SYMPOSIUM ON APPLIED COMPUTING, pp. 584–592.

By: X. Pan n & F. Mueller n

author keywords: memory access; NUMA; real-time predictability
TL;DR: This work contributes a controller/node-aware memory coloring (CAMC) allocator inside the Linux kernel for the entire address space to reduce access conflicts and latencies by isolating tasks from one another. (via Semantic Scholar)
UN Sustainable Development Goals Color Wheel
UN Sustainable Development Goal Categories
Source: Web Of Science
Added: January 28, 2019

2018 article

Improving Network Throughput with Global Communication Reordering

2018 32ND IEEE INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM (IPDPS), pp. 266–275.

By: W. Lavrijsen *, C. Iancu * & X. Pan n

TL;DR: This work implements on-the-fly algorithms that reorder message streams based on statistics inferred during execution based on intuition that long operations that occur in ranks that exhibit large execution variability need to be prioritized. (via Semantic Scholar)
UN Sustainable Development Goals Color Wheel
UN Sustainable Development Goal Categories
Source: Web Of Science
Added: October 16, 2018

2016 article

TintMalloc: Reducing Memory Access Divergence via Controller-Aware Coloring

2016 IEEE 30TH INTERNATIONAL PARALLEL AND DISTRIBUTED PROCESSING SYMPOSIUM (IPDPS 2016), pp. 363–372.

By: X. Pan n, Y. Gownivaripalli n & F. Mueller n

author keywords: NUMA; caches; memory controller; page coloring
TL;DR: Experimental results with the SPEC and Parsec benchmarks show that by choosing disjoint colors per thread, locality is increased, contention is decreased, and overall SPMD execution becomes more balanced at barriers than default memory allocation under Linux as well as prior coloring approaches. (via Semantic Scholar)
Source: Web Of Science
Added: August 6, 2018

Citation Index includes data from a number of different sources. If you have questions about the sources of data in the Citation Index or need a set of data which is free to re-distribute, please contact us.

Certain data included herein are derived from the Web of Science© and InCites© (2025) of Clarivate Analytics. All rights reserved. You may not copy or re-distribute this material in whole or in part without the prior written consent of Clarivate Analytics.