2010 journal article
A functional unit and register binding algorithm for interconnect reduction
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29(4), 641–646.
2010 conference paper
case study: gpu-based implementation of sequence pair based floorplanning using cuda
2010 ieee international symposium on circuits and systems, 917–920.
2009 journal article
Implementing Multiphase Resonant Clocking on a Finite-Impulse Response Filter
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 17(11), 1593–1601.
2007 journal article
Low-power rotary clock array design
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 15(1), 5–12.
2006 journal article
An efficient low-power repeater-insertion scheme
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 25(12), 2726–2736.
2005 journal article
HyPE: Hybrid power estimation for IP-based systems-on-chip
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 24(7), 1089–1103.
2005 journal article
Practical repeater insertion for low power: What repeater library do we need?
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 25(5), 917–924.
2004 journal article
A Markov chain sequence generator for power macromodeling
IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 23(7), 1048–1062.
2003 journal article
Design of a 20-Mb/s 256-state Viterbi decoder
IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 11(6), 965–975.
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