Xun Liu

Kim, T., & Liu, X. (2010). A functional unit and register binding algorithm for interconnect reduction. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 29(4), 641–646.

Choi, W. H., & Liu, X. (2010). case study: gpu-based implementation of sequence pair based floorplanning using cuda. 2010 ieee international symposium on circuits and systems, 917–920.

Yu, Z., & Liu, X. (2009). Implementing Multiphase Resonant Clocking on a Finite-Impulse Response Filter. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 17(11), 1593–1601. https://doi.org/10.1109/TVLSI.2008.2006477

Yu, Z., & Liu, X. (2007). Low-power rotary clock array design. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 15(1), 5–12. https://doi.org/10.1109/TVLSI.2006.887804

Peng, Y., & Liu, X. (2006). An efficient low-power repeater-insertion scheme. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 25(12), 2726–2736. https://doi.org/10.1109/TCAD.2006.882601

Liu, X., & Papaefthymiou, M. C. (2005). HyPE: Hybrid power estimation for IP-based systems-on-chip. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 24(7), 1089–1103. https://doi.org/10.1109/TCAD.2005.850891

Liu, X., Peng, Y. T., & Papaefthyrniou, M. C. (2005). Practical repeater insertion for low power: What repeater library do we need? IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 25(5), 917–924. https://doi.org/10.1109/TCAD.2005.855968

Liu, X., & Papaefthymiou, M. C. (2004). A Markov chain sequence generator for power macromodeling. IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 23(7), 1048–1062. https://doi.org/10.1109/TCAD.2004.829819

Liu, X., & Papaefthymiou, M. C. (2003). Design of a 20-Mb/s 256-state Viterbi decoder. IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, 11(6), 965–975. https://doi.org/10.1109/TVLSI.2003.817547