@article{yang_lee_misra_2019, title={Effects of LaSiOx Thickness and Forming Gas Anneal Temperature on Threshold Voltage Instability of 4H-SiC MOSFETs With LaSiOx}, volume={66}, ISSN={["1557-9646"]}, url={https://doi.org/10.1109/TED.2018.2875094}, DOI={10.1109/TED.2018.2875094}, abstractNote={We report the effects of lanthanum-rich layer thickness and forming gas anneal (FGA) conditions on mobility and threshold voltage (<inline-formula> <tex-math notation="LaTeX">${V} _{{\text {T}}}$ </tex-math></inline-formula>) instability of high-mobility 4H-SiC MOSFETs using lanthanum silicate (LaSiO<sub><italic>x</italic></sub>) interface engineering. MOSFETs with LaSiO<sub><italic>x</italic></sub> after high-temperature FGA show significantly improved <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> reliability under positive gate bias. It is found that both the thickness of the initial lanthanum-rich layer and the FGA temperature profoundly influence MOSFET mobility and <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> instability under positive bias. There is a tradeoff between mobility and <inline-formula> <tex-math notation="LaTeX">${V} _{\text {T}}$ </tex-math></inline-formula> shift under positive bias.}, number={1}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2019}, month={Jan}, pages={539–545} }
 @article{yang_lee_misra_2016, title={Electrical Characteristics of SiO2 Deposited by Atomic Layer Deposition on 4H–SiC After Nitrous Oxide Anneal}, volume={63}, ISSN={0018-9383 1557-9646}, url={http://dx.doi.org/10.1109/TED.2016.2565665}, DOI={10.1109/ted.2016.2565665}, abstractNote={Properties of SiO<sub>2</sub> gate dielectric deposited by atomic layer deposition (ALD) on Si-face of 4H silicon carbide (SiC) were systematically studied. The interface state and effective fixed charge densities of ALD SiO<sub>2</sub> on n-type 4H–SiC with various post deposition anneal (PDA) conditions were evaluated. It has been found that nitrous oxide (N<sub>2</sub>O) PDA not only reduces the effective fixed charge density, which includes the fixed oxide charge and charged interface states, at SiC/SiO<sub>2</sub> interface but also decreases the gate leakage current. Negative effective fixed charge is observed at SiC/ALD SiO<sub>2</sub> interface after N<sub>2</sub>O PDA. ALD SiO<sub>2</sub>-based lateral n-channel MOSFETs show high threshold voltage with the promising field-effect mobility and the peak field-effect mobility increases with N<sub>2</sub>O PDA temperature.}, number={7}, journal={IEEE Transactions on Electron Devices}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2016}, month={Jul}, pages={2826–2830} }
 @article{yang_lee_misra_2015, title={High Mobility 4H-SiC Lateral MOSFETs Using Lanthanum Silicate and Atomic Layer Deposited SiO2}, volume={36}, ISSN={["1558-0563"]}, DOI={10.1109/led.2015.2399891}, abstractNote={We report high mobility Si-face 4H-SiC MOSFET results via a novel interface engineering technique using a gate-stack consisting of lanthanum silicate (LaSiOx) and atomic layer deposited SiO2. Peak field effect mobility of 132.6 cm2/V · s has been achieved while maintaining a positive threshold voltage (3.1 V). From the peak field effect mobility's dependence on measurement temperatures, it has been found that the mobility of La containing MOSFET is limited by phonon scattering.}, number={4}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2015}, month={Apr}, pages={312–314} }
 @article{yang_lee_misra_2015, title={Investigation of Lanthanum Silicate Conditions on 4H-SiC MOSFET Characteristics}, volume={62}, ISSN={0018-9383 1557-9646}, url={http://dx.doi.org/10.1109/TED.2015.2480047}, DOI={10.1109/ted.2015.2480047}, abstractNote={The lanthanum silicate interface engineering has been shown to dramatically improve the mobility of 4H-silicon carbide (SiC) MOSFETs. We studied the impact of post deposition annealing (PDA) conditions and the initial lanthanum oxide (La<sub>2</sub>O<sub>3</sub>) thickness on the MOSFET performance. The combination of 900 °C PDA and 1 nm La<sub>2</sub>O<sub>3</sub> leads to highest field-effect mobility. Higher PDA temperature leads to mobility reduction due to lower lanthanum concentration at the SiC/dielectric interface. The peak mobility and threshold voltage show strong dependence on the initial La<sub>2</sub>O<sub>3</sub> thickness.}, number={11}, journal={IEEE Transactions on Electron Devices}, publisher={Institute of Electrical and Electronics Engineers (IEEE)}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2015}, month={Nov}, pages={3781–3785} }
 @article{yang_lee_misra_2014, title={High Mobility 4H-SiC MOSFETs Using Lanthanum Silicate Interface Engineering and ALD Deposited SiO2}, volume={778-780}, ISBN={["*****************"]}, ISSN={["0255-5476"]}, DOI={10.4028/www.scientific.net/msf.778-780.557}, abstractNote={In this work, we have developed a novel gate stack to enhance the mobility of Si face (0001) 4H-SiC lateral MOSFETs while maintaining a high threshold voltage. The gate dielectric consists a thin lanthanum silicate layer at SiC/dielectric interface and SiO2deposited by atomic layer deposition. MOSFETs using this interface engineering technique show a peak field effect mobility of 133.5 cm2/Vs while maintaining a positive threshold voltage of above 3V. The interface state density measured on MOS capacitor with lanthanum silicate interfacial layers is reduced compared to the capacitors without the silicate. It is shown that the presence of the lanthanum at the interface reduces the formation of a lower quality SiOxinterfacial layer typically formed at the SiC surface during typical high temperature anneals. This better quality interfacial layer produces a sharp SiC/dielectric interface, which is confirmed by cross section Z-contrast STEM images.}, journal={SILICON CARBIDE AND RELATED MATERIALS 2013, PTS 1 AND 2}, author={Yang, Xiangyu and Lee, Bongmook and Misra, Veena}, year={2014}, pages={557–561} }
 @article{kirkpatrick_lee_suri_yang_misra_2012, title={Atomic Layer Deposition of SiO2 for AlGaN/GaN MOS-HFETs}, volume={33}, ISSN={["1558-0563"]}, DOI={10.1109/led.2012.2203782}, abstractNote={This letter investigates the electrical properties of SiO<sub>2</sub> gate dielectric on GaN heterostructures deposited by atomic layer deposition (ALD). ALD SiO<sub>2</sub> has a dielectric constant of 3.9 and a bandgap of 8.8 eV. ALD SiO<sub>2</sub> provides a good interface to GaN and minimizes the interfacial layer growth. The threshold voltage of metal-oxide-semiconductor heterojunction field-effect transistors with ALD SiO<sub>2</sub> dielectric is -1.5 V, owing to a fixed charge concentration of -1.6 × 10<sup>12</sup> cm<sup>-2</sup>. It was also found that devices with ALD SiO<sub>2</sub> dielectric exhibit three orders of magnitude reduction in gate leakage current compared to conventional Schottky gate HFETs.}, number={9}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Kirkpatrick, Casey J. and Lee, Bongmook and Suri, Rahul and Yang, Xiangyu and Misra, Veena}, year={2012}, month={Sep}, pages={1240–1242} }
 @article{lee_kirkpatrick_choi_yang_huang_misra_2012, title={Normally-off AlGaN/GaN MOSHFET using ALD SiO2 tunnel dielectric and ALD HfO2 charge storage layer for power device application}, volume={9}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201100422}, abstractNote={Abstract}, number={3-4}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 9, NO 3-4}, author={Lee, Bongmook and Kirkpatrick, Casey and Choi, Young-hwan and Yang, Xiangyu and Huang, Alex Q. and Misra, Veena}, year={2012}, pages={868–870} }
 @article{lee_novak_lichtenwalner_yang_misra_2011, title={Investigation of the Origin of V-T/V-FB Modulation by La2O3 Capping Layer Approaches for NMOS Application: Role of La Diffusion, Effect of Host High-k Layer, and Interface Properties}, volume={58}, ISSN={["1557-9646"]}, DOI={10.1109/ted.2011.2159306}, abstractNote={The role of La<sub>2</sub>O<sub>3</sub> capping in the <i>VT</i>/<i>V</i><sub>FB</sub> shift with various high- <i>k</i> and metal gate electrodes was systematically investigated. It was found that the La concentration at the high-<i>k</i>/SiO<sub>2</sub> interface is mainly responsible for the <i>VT</i>/<i>V</i><sub>FB</sub> modulation in NMOS devices, whereas the effect of the host high-<i>k</i> and gate electrodes on <i>VT</i>/<i>V</i><sub>FB</sub> is minimal. A 400-mV shift in <i>VT</i> from the control HfO<sub>2</sub> device with minimal degradation in mobility was obtained when a La<sub>2</sub>O<sub>3</sub> layer was inserted between the high-<i>k</i> and SiO<sub>2</sub> layers. It was also found that the incorporation of La<sub>2</sub>O<sub>3</sub> in the dielectric stack improves device reliability in terms of breakdown and positive-bias temperature instability characteristics. The main key for the <i>V</i><sub>FB</sub> shift is the ability of La diffusion through the host high-<i>k</i> material.}, number={9}, journal={IEEE TRANSACTIONS ON ELECTRON DEVICES}, author={Lee, Bongmook and Novak, Steven R. and Lichtenwalner, Daniel J. and Yang, Xiangyu and Misra, Veena}, year={2011}, month={Sep}, pages={3106–3115} }
 @article{kirkpatrick_lee_yang_misra_wetzel_khan_2011, title={Performance improvement of AlGaN/GaN high electron mobility transistors with atomic layer deposition (ALD) of SiO2 and HfAlO dielectrics}, volume={8}, ISSN={["1862-6351"]}, DOI={10.1002/pssc.201001064}, abstractNote={Abstract}, number={7-8}, journal={PHYSICA STATUS SOLIDI C: CURRENT TOPICS IN SOLID STATE PHYSICS, VOL 8, NO 7-8}, author={Kirkpatrick, Casey and Lee, Bongmook and Yang, Xiangyu and Misra, Veena and Wetzel, C and Khan, A}, year={2011} }
 @article{kayis_leach_zhu_wu_li_oezguer_morkoc_yang_misra_handel_2010, title={Low-Frequency Noise Measurements of AlGaN/GaN Metal-Oxide-Semiconductor Heterostructure Field-Effect Transistors With HfAlO Gate Dielectric}, volume={31}, ISSN={["0741-3106"]}, DOI={10.1109/led.2010.2055823}, abstractNote={We report on the low-frequency phase-noise measurements of AlGaN/GaN metal-oxide-semiconductor heterostructure field-effect transistors employing HfAlO as the gate dielectric. Some devices tested exhibited noise spectra deviating from the well-known 1/fγ spectrum. These devices showed broad peaks in the noise spectral density versus frequency plots, which shifted toward higher frequencies at elevated temperatures. The temperature dependence of the frequency position of this peak allowed us to determine the energy level of these excess traps as 0.22 ± 0.06 eV below the conduction band for the bias conditions employed.}, number={9}, journal={IEEE ELECTRON DEVICE LETTERS}, author={Kayis, Cemil and Leach, Jacob H. and Zhu, C. Y. and Wu, Mo and Li, X. and Oezguer, Uemit and Morkoc, Hadis and Yang, X. and Misra, Veena and Handel, Peter H.}, year={2010}, month={Sep}, pages={1041–1043} }
 @article{novak_lee_yang_misra_2010, title={Platinum Nanoparticles Grown by Atomic Layer Deposition for Charge Storage Memory Applications}, volume={157}, ISSN={["1945-7111"]}, DOI={10.1149/1.3365031}, abstractNote={This paper explores platinum nanoparticle formation during the early stages of growth by atomic layer deposition. Particle size and distribution can be controlled by altering growth parameters. The particles show excellent temperature stability up to 900°C as examined by transmission electron microscopy and in situ heating. Capacitance-voltage and charge retention measurements demonstrate the memory effect in metal-oxide-semiconductor capacitors with embedded nanoparticles. The size, density, charge storage, and temperature stability of the platinum nanoparticles make them attractive for use as charge storage layers for nonvolatile memory devices.}, number={6}, journal={JOURNAL OF THE ELECTROCHEMICAL SOCIETY}, author={Novak, Steven and Lee, Bongmook and Yang, Xiangyu and Misra, Veena}, year={2010}, pages={H589–H592} }
 @article{jayanti_yang_lichtenwalner_misra_2010, title={Technique to improve performance of Al2O3 interpoly dielectric using a La2O3 interface scavenging layer for floating gate memory structures}, volume={96}, ISSN={["0003-6951"]}, DOI={10.1063/1.3355547}, abstractNote={A technique of scavenging the SiO2 interfacial layer (IL) to improve the electrical performance of Al2O3 as the interpoly dielectric for flash memories has been studied. Scavenging was performed by the reaction of a thin La2O3 layer with the native oxide to form a high-κ lanthanum silicate. Significant improvement in the charge trapping and leakage characteristics were obtained. Transmission electron microscopy analysis was done to corroborate the electrical results. Results show that seven orders of magnitude leakage reduction was achieved by the replacement of the SiO2 IL with a higher-κ dielectric LaSiO at the Si interface.}, number={9}, journal={APPLIED PHYSICS LETTERS}, author={Jayanti, Srikant and Yang, Xiangyu and Lichtenwalner, Daniel J. and Misra, Veena}, year={2010}, month={Mar} }
 @inproceedings{jayanti_yang_suri_misra_2010, title={Ultimate scalability of TaN metal floating gate with incorporation of High-K blocking dielectrics for flash memory applications}, DOI={10.1109/iedm.2010.5703301}, abstractNote={We have investigated ultrathin TaN metal floating gate (FG) with Hf based high-K interpoly dielectrics (IPD) for NAND Flash applications. In an attempt to investigate the memory behavior as the FG thickness is reduced, scalability of TaN FG down to 1 nm thickness has been explored. We have demonstrated excellent memory performance with program-erase (P-E) window as large as 16V. Our results indicate that high-K based IPD in conjunction with ultra-thin TaN metal FG can enable further scaling of NAND Flash memory beyond conventional oxide-nitride-oxide (ONO) based IPD technology.}, booktitle={2010 international electron devices meeting - technical digest}, author={Jayanti, S. and Yang, X. Y. and Suri, R. and Misra, Veena}, year={2010} }