2022 journal article
Implant Straggle Impact on 1.2 kV SiC Power MOSFET Static and Dynamic Parameters
IEEE JOURNAL OF THE ELECTRON DEVICES SOCIETY, 10, 245–255.
author keywords: 4H-SiC; accumulation; capacitance; cell optimization; gate charge; inversion; ion-implant straggle; on-resistance; silicon carbide; short-channel effect; transconductance
ieeexplore.ieee.org (publisher PDF)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy
(Web of Science)
Source: Web Of Science
Added: March 28, 2022
Significant impact of the ion-implant straggle of the P<sup>+</sup> shielding region on the static and dynamic characteristics of 1.2 kV 4H-SiC power MOSFETs is demonstrated in this paper by using analytical and TCAD modeling. The P<sup>+</sup> region ion-implant straggle not only reduces the JFET width but increases the channel length. This combination is shown to displace a SiC power MOSFET structure optimized without ion-implant straggle away from the optimum JFET width required to achieve the lowest specific on-resistance, resulting in an increase in the specific on-resistance by a factor of 2-3x for the typically used JFET width of <inline-formula> <tex-math notation="LaTeX">$0.7 \mu \text{m}$ </tex-math></inline-formula>. The theoretical analysis is supported by data measured on 1.2 kV SiC power MOSFETs fabricated with channel lengths of 0.3 and <inline-formula> <tex-math notation="LaTeX">$0.5 \mu \text{m}$ </tex-math></inline-formula> using both accumulation and inversion mode channels. The presence of the P<sup>+</sup> shielding region ion-implant straggle is shown to: (a) increase specific on-resistance by 15-30%; (b) suppress short-channel effects; (c) reduce electric field in the gate oxide; (d) reduce the transconductance; (e) reduce saturated drain current; and (f) significantly reduce the gate-drain capacitance and gate charge. Impact of P<sup>+</sup> shielding region lateral straggle on device cell optimization is an important contribution of this paper.