Works (9)

Updated: July 5th, 2023 16:03

2004 journal article

Breakdown and reliability of p-MOS devices with stacked RPECVD oxide/nitride gate dielectric under constant voltage stress

MICROELECTRONICS RELIABILITY, 44(2), 207–212.

By: Y. Lee n, Y. Wu* & G. Lucovsky n

TL;DR: The breakdown characteristics and time-to-breakdown (tBD) are recorded from p+-poly/n-Si capacitors under constant voltage stress (CVS) at different temperatures, and it is projected that the maximum safe operating voltage is ∼1.9 V for 2.07 nm O/N gate dielectric. (via Semantic Scholar)
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Source: Web Of Science
Added: August 6, 2018

2003 journal article

Structural dependence of breakdown characteristics and electrical degradation in ultrathin RPECVD oxide/nitride gate dielectrics under constant voltage stress

SOLID-STATE ELECTRONICS, 47(1), 71–76.

By: Y. Lee n, Y. Wu*, C. Bae n, J. Hong n & G. Lucovsky n

author keywords: dielectric degradation; soft breakdown; RPECVD oxide/nitride dielectric; stress-induced leakage current; constant voltage stress; hard breakdown
Source: Web Of Science
Added: August 6, 2018

2000 journal article

1.6 nm oxide equivalent gate dielectrics using nitride/oxide (N/O) composites prepared by RPECVD/oxidation process

IEEE ELECTRON DEVICE LETTERS, 21(3), 116–118.

By: Y. Wu*, Y. Lee n & G. Lucovsky n

author keywords: gate dielectric; MOSFET; nitride; oxide; tunneling current
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Source: Web Of Science
Added: August 6, 2018

2000 journal article

The performance and reliability of PMOSFET's with ultrathin silicon nitride/oxide stacked gate dielectrics with nitrided Si-SiO2 interfaces prepared by remote plasma enhanced CVD and post-deposition rapid thermal annealing

IEEE TRANSACTIONS ON ELECTRON DEVICES, 47(7), 1361–1369.

By: Y. Wu n, G. Lucovsky n & Y. Lee n

author keywords: boron penetration; gate dielectrics; nitride; N/O; oxide
Source: Web Of Science
Added: August 6, 2018

2000 journal article

Time-dependent dielectric wearout technique with temperature effect for reliability test of ultrathin (< 2.0 nm) single layer and dual layer gate oxides

Time-dependent dielectric wearout technique with temperature effect for reliability test of ultrathin (< 2.0 nm) single layer and dual layer gate oxides. MICROELECTRONICS RELIABILITY, 40(12), 1987–1995.

By: Y. Wu*, Q. Xiang*, J. Yang*, G. Lucovsky n & M. Lin*

UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Source: Web Of Science
Added: August 6, 2018

1999 journal article

Bonding constraints and defect formation at interfaces between crystalline silicon and advanced single layer and composite gate dielectrics

APPLIED PHYSICS LETTERS, 74(14), 2005–2007.

By: G. Lucovsky n, Y. Wu n, H. Niimi n, V. Misra n & J. Phillips

Sources: Web Of Science, ORCID
Added: August 6, 2018

1999 journal article

Time dependent dielectric wearout (TDDW) technique for reliability of ultrathin gate oxides

IEEE ELECTRON DEVICE LETTERS, 20(6), 262–264.

By: Y. Wu*, Q. Xiang*, D. Bang*, G. Lucovsky n & M. Lin*

author keywords: reliability TDDB; TDDW; ultrathin oxide
UN Sustainable Development Goal Categories
7. Affordable and Clean Energy (OpenAlex)
Source: Web Of Science
Added: August 6, 2018

1998 article

Optimization of nitrided gate dielectrics by plasma-assisted and rapid thermal processing

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY A, Vol. 16, pp. 1721–1729.

By: G. Lucovsky n, H. Niimi n, Y. Wu n, C. Parker n & . Hauser n

Source: Web Of Science
Added: August 6, 2018

1998 journal article

Ultrathin nitride/oxide (N/O) gate dielectrics for p(+)-polysilicon gated PMOSFET's prepared by a combined remote plasma enhanced CVD thermal oxidation process

IEEE ELECTRON DEVICE LETTERS, 19(10), 367–369.

By: Y. Wu n & G. Lucovsky n

author keywords: boron penetration; gate dielectrics; nitride; N/O
Source: Web Of Science
Added: August 6, 2018

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