Works (7)
1998 article
Low parasitic resistance contacts for scaled ULSI devices
Osburn, C. M., & Bellur, K. R. (1998, November 2). THIN SOLID FILMS, Vol. 332, pp. 428–436.
1998 journal article
Parasitic resistance considerations of using elevated source/drain technology for deep submicron metal oxide semiconductor field effect transistors
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 145(6), 2131–2137.
1997 conference paper
A 0.18 ?m CMOS technology for elevated source/drain MOSFETs using selective silicon epitaxy
ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 571–585. Pennington, NJ: Electrochemical Society.
1997 journal article
A comparative study of n(+)/p junction formation for deep submicron elevated source/drain metal oxide semiconductor field effect transistors
JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 144(10), 3659–3664.
1997 conference paper
Parasitic resistance considerations of using elevated source/drain for deep submicron MOSFET technology
ULSI science and technology/1997: Proceedings of the Sixth International Symposium on UltraLarge Scale Integration Science and Technology (Proceedings (Electrochemical Society); v. 97-3), 587–597. Pennington, NJ: Electrochemical Society.
1997 journal article
The effect of the elevated source drain doping profile on performance and reliability of deep submicron MOSFET's
IEEE TRANSACTIONS ON ELECTRON DEVICES, 44(9), 1491–1498.
1996 article
Sub-half micron elevated source/drain NMOSFETs by low temperature selective epitaxial deposition
RAPID THERMAL AND INTEGRATED PROCESSING V, Vol. 429, pp. 343–347.